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Processor : ARMv7 Processor rev 3 (v7l) BogoMIPS : 249.96 Features : swp half thumb fastmult vfp edsp neon vfpv3 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x1 CPU part : 0xc08 CPU revision : 3 Hardware : mapphone_UMTS Revision : 0000 Serial : 0000000000000000 GPIOs 0-31, gpio: gpio-0 (cpcap-irq ) in lo irq-160 edge-rising wakeup gpio-8 (wl127x_wake_gpio ) out lo gpio-10 (mapphone dock north ) in lo irq-170 edge-both wakeup gpio-23 (? ) out lo gpio-28 (akm8973 reset ) out lo GPIOs 32-63, gpio: gpio-34 (gpio_kp_in ) in hi irq-194 level-low wakeup gpio-35 (gpio_kp_in ) in hi irq-195 level-low wakeup gpio-36 (gpio_kp_in ) in hi irq-196 level-low wakeup gpio-37 (gpio_kp_in ) in hi irq-197 level-low wakeup gpio-38 (gpio_kp_in ) in hi irq-198 level-low wakeup gpio-39 (gpio_kp_in ) in hi irq-199 level-low wakeup gpio-40 (gpio_kp_in ) in hi irq-200 level-low wakeup gpio-41 (gpio_kp_in ) in hi irq-201 level-low wakeup gpio-43 (gpio_kp_out ) out lo gpio-53 (gpio_kp_out ) out lo gpio-54 (gpio_kp_out ) out lo gpio-55 (gpio_kp_out ) out lo gpio-56 (gpio_kp_out ) out lo gpio-57 (gpio_kp_out ) out lo gpio-58 (gpio_kp_out ) out lo gpio-59 (? ) out lo gpio-63 (gpio_kp_out ) out lo GPIOs 64-95, gpio: gpio-65 (wifi_irq ) in hi irq-225 edge-falling wakeup gpio-92 (mapphone als int ) in hi irq-252 edge-falling GPIOs 96-127, gpio: gpio-99 (mapphone touch irq ) in hi irq-259 ?trigger? gpio-100 (gpio_kp_in ) in lo irq-260 edge-both wakeup gpio-111 (mapphone dock south ) in hi irq-271 edge-both wakeup GPIOs 128-159, gpio: gpio-136 (display reset ) out lo gpio-141 (BP -> AP IPC trigger) in lo irq-301 edge-both wakeup gpio-143 (mapphone audio path ) out lo gpio-157 (UART AP -> BP wakeup) out lo GPIOs 160-191, gpio: gpio-163 (mmc_detect ) in lo irq-323 edge-both gpio-164 (mapphone touch reset) out lo gpio-175 (akm8973 irq ) in lo gpio-176 (mapphone power off ) out lo gpio-177 (gpio_kp_in ) in lo irq-337 edge-both wakeup gpio-178 (wl127x_hostwake_gpio) in lo gpio-179 (wl127x_bt_nshutdown_) out lo gpio-180 (sfh7743 proximity in) in hi irq-340 edge-both wakeup gpio-181 (vibrator ) out lo gpio-186 (wifi_pmena ) out lo DSS_REVISION 00000020 DSS_SYSCONFIG 00000001 DSS_SYSSTATUS 00000001 DSS_IRQSTATUS 00000000 DSS_CONTROL 00000003 DSS_SDI_CONTROL 00000000 DSS_PLL_CONTROL 00000000 DSS_SDI_STATUS 00000102 DISPC_REVISION 00000030 DISPC_SYSCONFIG 00002015 DISPC_SYSSTATUS 00000001 DISPC_IRQSTATUS 00000000 DISPC_IRQENABLE 0000d64e DISPC_CONTROL 00018b08 DISPC_CONFIG 00010204 DISPC_CAPABLE 000003ff DISPC_DEFAULT_COLOR0 00000000 DISPC_DEFAULT_COLOR1 00000000 DISPC_TRANS_COLOR0 00000000 DISPC_TRANS_COLOR1 00000000 DISPC_LINE_STATUS 000007ff DISPC_LINE_NUMBER 00000000 DISPC_TIMING_H 00000000 DISPC_TIMING_V 00000000 DISPC_POL_FREQ 00000000 DISPC_DIVISOR 00010004 DISPC_GLOBAL_ALPHA 000000ff DISPC_SIZE_DIG 00000000 DISPC_SIZE_LCD 035501df DISPC_GFX_BA0 8156f000 DISPC_GFX_BA1 8156f000 DISPC_GFX_POSITION 00000000 DISPC_GFX_SIZE 035501df DISPC_GFX_ATTRIBUTES 00000099 DISPC_GFX_FIFO_THRESHOLD 03c00000 DISPC_GFX_FIFO_SIZE_STATUS 00000400 DISPC_GFX_ROW_INC 00000001 DISPC_GFX_PIXEL_INC 00000001 DISPC_GFX_WINDOW_SKIP 00000000 DISPC_GFX_TABLE_BA 00000000 DISPC_DATA_CYCLE1 00000000 DISPC_DATA_CYCLE2 00000000 DISPC_DATA_CYCLE3 00000000 DISPC_CPR_COEF_R 00000000 DISPC_CPR_COEF_G 00000000 DISPC_CPR_COEF_B 00000000 DISPC_GFX_PRELOAD 00000100 DISPC_VID_BA0(0) 00000000 DISPC_VID_BA1(0) 00000000 DISPC_VID_POSITION(0) 00000000 DISPC_VID_SIZE(0) 00000000 DISPC_VID_ATTRIBUTES(0) 00000000 DISPC_VID_FIFO_THRESHOLD(0) 03ff03c0 DISPC_VID_FIFO_SIZE_STATUS(0) 00000400 DISPC_VID_ROW_INC(0) 00000001 DISPC_VID_PIXEL_INC(0) 00000001 DISPC_VID_FIR(0) 00000000 DISPC_VID_PICTURE_SIZE(0) 00000000 DISPC_VID_ACCU0(0) 00000000 DISPC_VID_ACCU1(0) 00000000 DISPC_VID_BA0(1) 00000000 DISPC_VID_BA1(1) 00000000 DISPC_VID_POSITION(1) 00000000 DISPC_VID_SIZE(1) 00000000 DISPC_VID_ATTRIBUTES(1) 00000000 DISPC_VID_FIFO_THRESHOLD(1) 03ff03c0 DISPC_VID_FIFO_SIZE_STATUS(1) 00000400 DISPC_VID_ROW_INC(1) 00000001 DISPC_VID_PIXEL_INC(1) 00000001 DISPC_VID_FIR(1) 00000000 DISPC_VID_PICTURE_SIZE(1) 00000000 DISPC_VID_ACCU0(1) 00000000 DISPC_VID_ACCU1(1) 00000000 DISPC_VID_FIR_COEF_H(0, 0) 00000000 DISPC_VID_FIR_COEF_H(0, 1) 00000000 DISPC_VID_FIR_COEF_H(0, 2) 00000000 DISPC_VID_FIR_COEF_H(0, 3) 00000000 DISPC_VID_FIR_COEF_H(0, 4) 00000000 DISPC_VID_FIR_COEF_H(0, 5) 00000000 DISPC_VID_FIR_COEF_H(0, 6) 00000000 DISPC_VID_FIR_COEF_H(0, 7) 00000000 DISPC_VID_FIR_COEF_HV(0, 0) 00000000 DISPC_VID_FIR_COEF_HV(0, 1) 00000000 DISPC_VID_FIR_COEF_HV(0, 2) 00000000 DISPC_VID_FIR_COEF_HV(0, 3) 00000000 DISPC_VID_FIR_COEF_HV(0, 4) 00000000 DISPC_VID_FIR_COEF_HV(0, 5) 00000000 DISPC_VID_FIR_COEF_HV(0, 6) 00000000 DISPC_VID_FIR_COEF_HV(0, 7) 00000000 DISPC_VID_CONV_COEF(0, 0) 0199012a DISPC_VID_CONV_COEF(0, 1) 012a0000 DISPC_VID_CONV_COEF(0, 2) 079c0730 DISPC_VID_CONV_COEF(0, 3) 0000012a DISPC_VID_CONV_COEF(0, 4) 00000205 DISPC_VID_FIR_COEF_V(0, 0) 00000000 DISPC_VID_FIR_COEF_V(0, 1) 00000000 DISPC_VID_FIR_COEF_V(0, 2) 00000000 DISPC_VID_FIR_COEF_V(0, 3) 00000000 DISPC_VID_FIR_COEF_V(0, 4) 00000000 DISPC_VID_FIR_COEF_V(0, 5) 00000000 DISPC_VID_FIR_COEF_V(0, 6) 00000000 DISPC_VID_FIR_COEF_V(0, 7) 00000000 DISPC_VID_FIR_COEF_H(1, 0) 00000000 DISPC_VID_FIR_COEF_H(1, 1) 00000000 DISPC_VID_FIR_COEF_H(1, 2) 00000000 DISPC_VID_FIR_COEF_H(1, 3) 00000000 DISPC_VID_FIR_COEF_H(1, 4) 00000000 DISPC_VID_FIR_COEF_H(1, 5) 00000000 DISPC_VID_FIR_COEF_H(1, 6) 00000000 DISPC_VID_FIR_COEF_H(1, 7) 00000000 DISPC_VID_FIR_COEF_HV(1, 0) 00000000 DISPC_VID_FIR_COEF_HV(1, 1) 00000000 DISPC_VID_FIR_COEF_HV(1, 2) 00000000 DISPC_VID_FIR_COEF_HV(1, 3) 00000000 DISPC_VID_FIR_COEF_HV(1, 4) 00000000 DISPC_VID_FIR_COEF_HV(1, 5) 00000000 DISPC_VID_FIR_COEF_HV(1, 6) 00000000 DISPC_VID_FIR_COEF_HV(1, 7) 00000000 DISPC_VID_CONV_COEF(1, 0) 0199012a DISPC_VID_CONV_COEF(1, 1) 012a0000 DISPC_VID_CONV_COEF(1, 2) 079c0730 DISPC_VID_CONV_COEF(1, 3) 0000012a DISPC_VID_CONV_COEF(1, 4) 00000205 DISPC_VID_FIR_COEF_V(1, 0) 00000000 DISPC_VID_FIR_COEF_V(1, 1) 00000000 DISPC_VID_FIR_COEF_V(1, 2) 00000000 DISPC_VID_FIR_COEF_V(1, 3) 00000000 DISPC_VID_FIR_COEF_V(1, 4) 00000000 DISPC_VID_FIR_COEF_V(1, 5) 00000000 DISPC_VID_FIR_COEF_V(1, 6) 00000000 DISPC_VID_FIR_COEF_V(1, 7) 00000000 DISPC_VID_PRELOAD(0) 00000100 DISPC_VID_PRELOAD(1) 00000100
